Digital-to-analog converters (DACs) are discrete-time (clocked), discrete-valued systems. Generally, a DAC accepts words of a digital input data signal having a certain width at discrete times, typically at a constant rate referred to as the “clock frequency,” and produces a finite set of distinct analog output values. In order to obtain a continuous-valued, smooth waveform, the output values pass through a reconstruction filter. Nearly ideal reconstruction filters may be designed for some special purpose systems. However, for a very high-speed DAC and/or for variable-impedance output loads, the reconstruction filter is typically far from ideal. Thus, the resulting waveform of the output values, while approaching the desired waveform once per update period, has large instantaneous errors, which are generally proportional to the size of the step (difference) between adjacent output values of the DAC.
When the reconstruction filter cannot be improved (i.e., made more ideal), the instantaneous errors may be reduced by updating the DAC more often, resulting in smaller difference steps between adjacent output values, and/or by increasing the resolution of the DAC, resulting in a larger, more finely spaced set of possible output values. However, for a high-speed DAC, these approaches are expensive and difficult, if not impossible, to implement in the context of a given technology, e.g., due to limitations in providing the digital input data signal at a faster rate and in configuring switches to more quickly select or produce the output values.